The channel Creativo en Japón had the pleasure of interviewing exclusively JOTEGO, the engineer behind numerous console and arcade cores, to talk about the development of the new Neo Geo AES+.

From MiSTer FPGA to silicon

JOTEGO, together with Furrtek, is responsible for the core that powers the Neo Geo AES+ ASIC chip. The starting point was the Neo Geo core for MiSTer FPGA, but the move to silicon required very specific decisions to guarantee maximum fidelity.

Audio identical to the original AES

JOTEGO removed the interpolator he had introduced in the MiSTer core to ensure the AES+ audio is as close as possible to the original AES hardware.

Zero latency: the cable connected directly to the chip

Input latency is virtually zero because the controller is connected directly to the ASIC chip, exactly as on the original console — no intermediate software layer.